tms320c6748_tms320c6748中文资料_tms320c6748 sata例程(2)

第二，在模块化设计中，模块与系统的通信是系统设计的关键问题之一，本文结合系统在实际应用中的需求，提出利用异步FIFO 实现信号处理模块与母板的跨时域高速通信方案。 第三，通过实验验证了信号处理模块各部分的功能及其稳定性，并设计测试程序，通过利用DSP 读取FPGA 内部构建的异步FIFO 中存储的波形数据，验证系统通信方案的可行性。tms320c6748关键词：DSP ；TMS320C6748 ；模块化；DSP 与FPGA 通信哈尔滨工程大学硕论文 基于TMS320C6748 高速DSP 信号处理模块设计 ABSTRACT With the growing of the development and utilization of marine and maritime securitysituation of China 's increasingly serious, detection of the marine environment has gainedmore and more attention. Multi-beam Echo-sounder is a kind of underwater landformmeasurement equipment for high precision and high efficiency, has gradually become one ofthe most widely used and most effective depth in the ocean and the topography detectioninstruments. Along with the popularization and application of Multi-beam Echo-sounder,people put forward higher requirements on the accuracy, efficiency and portability. Theunderwater acoustic signal processing theory has been gradually formed a relatively maturesystem, and with the rapid development of various algorithms, and also put forward higherrequirements on the digital signal processing system. The signal acquisition and processingsystem of new Multi-beam Echo-sounder requirement is low power consumption, highefficiency, miniaturization and modularization. We design a signal acquisition and processing system mother based on the structure ofmainboard + module of the signal processing. DSP+FPGA is the core of the system. Thispaper focuses on the research of signal processing module with TMS320C6748 DSP as thecore, and the design considerations of the system from the following aspects. Firstly, an idea of modular design is presented in this paper, and yzes the benefits ofmodular design. Based on the idea, this paper designs the hardware scheme of processingmodule which uses the TI TMS320C6748 DSP as the core. And descript the detail of thepower management, memory design, intece design, and complete the design and debuggingof hardware PCB. Secondly, in a modular design, communication module and system is one of the keyproblems in system design. Combining with the system requirements in the practicalapplication, this paper makes a plan for the high-speed communication between the signalprocessing module and mother board using asynchronous FIFO. Thirdly, function and stability of each part of the signal processing module is verified byexperiment. The paper designs a test program to verify the feasibility of communication plan.Key words: DSP; TMS320C6748; Modularization; Communication between DSP and FPGA哈尔滨工程大学硕论文 基于TMS320C6748 高速DSP 信号处理模块设计 目 录第1 章 绪论·······························································································1 1.1 论文研究背景及意义···········································································1 1.2 模块化设计在数字信号处理系统中的应用及发展·······································1 1.3 论文主要工作····················································································3第2 章 系统方案设计···················································································4 2.1 多波束测深系统简介···········································································4 2.1.1 多波束测深基本原理·······································································4 2.1.2 多波束测深系统组成结构和工作过程··················································5 2.2 现有信号采集与处理系统的特点····························································6 2.2.1 现有信号采集与处理系统的结构及优点···············································6 2.2.2 现有信号采集与处理系统的问题························································7 2.3 系统架构方案····················································································8 2.3.1 模块化的特点················································································8 2.3.2 系统结构······················································································9 2.4 本章小结 ·························································································10第3 章 信号处理模块硬件电路设计································································11 3.1 DSP 芯片选型····················································································11 3.1.1 DSP 芯片选型需要考虑的因素··························································11 3.1.2 TMS320C6748 被选择的原因····························································11 3.2 信号处理模块基本结构········································································12 3.2.1 信号处理模块的组成······································································12 3.2.2 TMS320C6000 概述········································································13 3.2.3 TMS320C6748 DSP 简介·································································14 3.3 电源设计·························································································16 3.3.1 电源设计基本思想及参数································································16 3.3.2 电源管理芯片介绍·········································································17 3.3.3 电压输出设计···············································································18 3.3.4 电源开始供电和停止供电的时序·······················································19 3.3.5 复位电路·····················································································21 3.4 存储器及BOOT 模式设计 ···································································23 哈尔滨工程大学硕论文 3.4.1 mDDR 存储器设计·········································································23 3.4.2 SPI Flash 存储器设计 ······································································24 3.4.3 BOOT 模式及其选择电路·································································26 3.5 JTAG 接口及时钟电路设计···································································27 3.5.1 JTAG 接口设计··············································································27 3.5.2 时钟产生电路···············································································28 3.6 硬件电路PCB 设计············································································28 3.6.1 PCB 叠层设计···············································································28 3.6.2 PCB 布局及布线过程中的完整性问题·················································29 3.7 本章小结 ·························································································30第4 章 信号处理模块与FPGA 通信方案···························································32 4.1 跨时域数据传输················································································32 4.2 TMS320C6748 DSP 与FPGA 通信的接口·················································33 4.3 利用异步FIFO 通信的实现方法····························································34 4.3.1 EMIFA 异步接口时序······································································34 4.3.2 DSP 与FIFO 的接口逻辑·································································35 4.4 本章小结 ·························································································37第5 章 系统调试与验证···············································································38 5.1 系统电源、时钟的调试与验证······························································38 5.1.1 电源管理模块的调试及验证·····························································38 5.1.2 系统时钟的调试及验证···································································40 5.2 DSP 及其部分外设的调试与验证····························································40 5.2.1 DSP 核心调试及验证 ······································································40 5.2.2 SPI Flash 读写验证 ·········································································41 5.2.3 mDDR 存储器读写验证···································································42 5.3 信号处理模块与采集板通信的调试与验证···············································43 5.4 本章小结 ·························································································46结 论 ··································································································47参考文献 ··································································································49攻读硕期间发表的论文和取得的科研成果···············································52致 谢 ··································································································53附 录 ··································································································55 第1 章 绪论 第1 章 绪论1.1 论文研究背景及意义 近年来，我国对于海洋的探测开发需求日益急迫。

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