spread spectrum clocking_xilinx pre-production_Free running(11)

In some embodiments, voltage output of the voltage modulator 616 may be controlled by the adaptive SSC module 330 via the processor 312 so that output frequency of the voltage-controlled oscillator 610 follows the desired adaptive SSC profile 404。 Parameters describing the adaptive SSC profile 404, including the high and low modulation rates, cycle timing values, and/or the like, may be stored as part of the adaptive SSC module 330 in the firmware of the controller 310 described above in regard to FIG。

3。 In other embodiments, the control of the voltage modulator 616 based on the parameters describing the desired adaptive SSC profile 404 may be implemented in the adaptive SSC circuit 320。

In further embodiments, a processor-controlled phase modulator 618 may be added between the voltage-controlled oscillator 610 and the divider 612. By changing phase delay of the voltage-controlled oscillator 610 output, the error signal from the phase frequency detector 604 may be changed to cause the desired frequency changes in the output clock signal 614 from the voltage-controlled oscillator 610. The adaptive SSC module 330 may control the phase delay of the phase modulator 618 so that the output frequency of the voltage-controlled oscillator 610 follows the desired adaptive SSC profile 404. In other embodiments, the control of the phase modulator 618 based on the parameters describing the desired adaptive SSC profile 404 may be implemented in the adaptive SSC circuit 320.

In further embodiments, the divider 612 may be controlled by the processor to change the dividing rate of the divider. By changing the dividing rate, the error signal from the error signal from the phase frequency detector 604 may be changed to cause the desired frequency changes in the output clock signal 614 from the voltage-controlled oscillator 610. The adaptive SSC module 330 may control the dividing rate of the divider 612 via the processor so that the output frequency of the voltage-controlled oscillator 610 follows the desired adaptive SSC profile 404. In other embodiments, the control of the dividing rate of the divider 612 based on the parameters describing the desired adaptive SSC profile 404 may be implemented in the adaptive SSC circuit 320.

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