tms320lf2407_tms320是什么_tms320lf2407中文资料(3)

33-ns Instruction Cycle Time (30 MHz)

30-MIPS Performance

Low-Power 3.3-V Design

Based on TMS320C2xx DSP CPU Core

Code-Compatible With F243/F241/C242

Instruction Set and Module Compatible With F240/C240

On-Chip Memory

Up to 32K Words x 16 Bits of Flash EEPROM (4 Sectors)

Up to 2.5K Words x 16 Bits of Data/Program RAM

544 Words of Dual-Access RAM

Up to 2K Words of Single-Access RAM

Boot ROM

SCI/SPI Bootloader

Two Event-Manager (EV) Modules (EVA and EVB), Each Include:

Two 16-Bit General-Purpose Timers

Eight 16-Bit Pulse-Width Modulation (PWM) Channels Which Enable:

Three-Phase Inverter Control

Center- or Edge-Alignment of PWM Channels

Emergency PWM Channel Shutdown With External PDPINTx\ Pin

Programmable Deadband (Deadtime) Prevents Shoot-Through Faults

Three Capture Units For Time-Stamping of External Events

On-Chip Position Encoder Intece Circuitry

Synchronized Analog-to-Digital Conversion

Designed for AC Induction, BLDC, Switched Reluctance, and Stepper Motor Control

Applicable for Multiple Motor and/or Converter Control

External Memory Intece (LF2407)

192K Words x 16 Bits of Total Memory:

64K Program, 64K Data, 64K I/O

Watchdog (WD) Timer Module

10-Bit Analog-to-Digital Converter (ADC)

8 or 16 Multiplexed Input Channels

500 ns Minimum Conversion Time

Selectable Twin 8-Input Sequencers Triggered by Two Event Managers

Controller Area Network (CAN) 2.0B Module

Serial Communications Intece (SCI)

16-Bit Serial Peripheral Intece (SPI) Module

Phase-Locked-Loop (PLL)-Based Clock Generation

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