gpu是图形处理单元(graphicsprocessingunit)的缩写，它处理所有桌面上或游戏中的图形，分担一些cpu负载，在游戏中，cpu要执行人工智能计算和冲突检查，任务十分繁重，因此任何帮助都是欢迎的，gpu本身搭载了良好的并行架构通用计算平台，使算术运算和推导、科研、医疗等诸多领域都有广阔的演进前景但本文作者祁海江结合自身的经验，对中国现在的云计算服务进行观察后认为，国内云服务商多数采取更加简洁粗放的“远程机房+移动大硬盘”模式，不能满足并行图形处理的推导需求，“应尽早认清技术潮流通用计算平台，整合前沿计算软件，以便加强云gpu并行计算服务
瞬选凿Xperia系列设备上支持OpenCL。2研究进展2.1移动GPGPU速度和性能体现利用移动系统仔计算有两改：①为了提升应用恍速度，满足实时性要驱如头部识壁为了提高应用恍功耗，有效解决移动电源电量有限的弊端。下面分毙说檬紫确治GPGPU的速度表现。由于GPU支持矗的并行运算，较CPU有更多运算单元，亿GPU上酌计算可以有独特的速度表现。韩国汉学的JungsikPark[6]等在文章中介绍其用移动系统GPU开展立体图淆的研究。他们选择的通用计算系统为OpenGLES2.0，研究结果看到GPU执行立体图淆的时间比单独CPU执行时间快两到三倍。还有众多研究者相同有效运用了移动系统GPU超强的通用计算速率优势[25]。接着分委GPGPU的功耗表现。根据APChandrakasan[7]等在文章中的描蔖U中门切换消耗的能量为电阻（C）乘以电流（V）的平方。这些门在1秒内切换的数量等于频率。一甫理痞耗计算为P=CV2f。如果将一甘为f、电压为V的单核处理埔桓频乃舜砥扛镜钠德饰f/2）进行非常，芯片中的回路数会增加。
全新双核英特尔至强处理器明显提高了关键业务应用的性能，能够借助提高计算强度、安全性与可扩展性、降低性能或者更多其他形式来帮助企业促进数据中心的利润不像6系列n卡这样增加通用计算减少能耗从而加强游戏性能，titan还是保留的大部份通用计算能力的，而且它的功耗并不高关键词：均衡器，自适应，lms，verilog，fpgai--------------------------page4------------------------------数字均衡器的设计及verilog实现designandverilogimplementationofdigitalequalizerabstractwiththeprogressofdigitalsignalprocessingandintegratedcircuittechnology,digitalcommunicationhassteppedintoahighspeedandhighreliabilitystage.intersymbolinterference(isi)isgeneratedwhendigitalsignalistransmittedthroughachannelwithnon-idealtransmissioncharacteristics,resultingintheincrementofsignalnoiseratio(snr).equalizationtechnologyisusuallyusedtoeliminatetheisi.adaptiveequalizationtechnologycantracetimechangingchanneltoreducetheadverseeffectfromisiandnoisetothecommunicationquality.soanequalizerisverynecessaryinreceiverblockofacommunicationsystem.themechanismofgenerationandeliminationofisiandtheprincipleofequalizationisdiscussedinthisdissertation.algorithmofzero-force,lms,vss-lmsandrlsisanalyzedfromtheviewpointofboththeoryandcomputersimulation.itisfoundthatvss-lmswithaγvalue0.00048canimprovetheconvergentspeedoflmsalgorithm.comparewithrls,lmshasaslowerconvergentspeed.foritssimplestructure,lmsiseasytoimplementonhardware.anadaptiveequalizerbasedonlmsalgorithmisdesignedwithveriloghdllanguageusedtop-downmethod.designideaoftopmoduleanddetaildescribeisprovidedandelucidated.itisshownthatwithmodelsimsimulationconfirmation,thisequalizeriseffectiveinadaptivefiltering.finally,thedesignissynthesizedandrealizedonalteracycloneiiepep22cc55tt144144144cc8withquartusii.keywords:equalizer，adaptive，lms，verilog，fpgaii--------------------------page5------------------------------河北工业学校本科学位论文目录第一章概述.............................................................................................................1§1-1研究的目的与含义.........................................................................................................................1§1-2fpga简介......................................................................................................................................1§1-3可编程器件的发展情况.................................................................................................................2§1-4均衡技术的发展情况.....................................................................................................................4§1-5本课题主要工作和内容安排.........................................................................................................4第二章码间串扰与均衡原理.................................................................................6§2-1数字基带传输平台特性及码间串扰..............................................................................................62-1-1数字基带传输平台的物理预测................................................................................................62-1-2码间串扰产生的机理................................................................................................................7§2-2码间串扰的消除..............................................................................................................................72-2-1消除码间串扰的基本原理........................................................................................................72-2-2理想间串扰的条件：奈奎斯特第一准则.........................................................................7§2-3均衡器原理......................................................................................................................................92-3-1时域均衡原理............................................................................................................................92-3-2均衡效果衡量...........................................................................................................................11第三章自适应均衡算法.......................................................................................12§3-1迫零算法........................................................................................................................................123-1-1算法介绍.................................................................................................................................123-1-2算法仿真.................................................................................................................................12§3-2最小均方（lms）算法..............................................................................................................153-2-1算法介绍.................................................................................................................................153-2-2算法仿真.................................................................................................................................163-2-3变步长lms算法...................................................................................................................19§3-3递归最小二乘（rls）算法.......................................................................................................213-3-1算法介绍.................................................................................................................................213-3-2rls算法与lms算法的非常................................................................................................22第四章lms自适应均衡器的verilog设计........................................................24§4-1设计方式与步骤............................................................................................................................244-1-1fpga设计方式.......................................................................................................................244-1-2典型的fpga设计流程..........................................................................................................244-1-3ip核简介与使用......................................................................................................................254-1-4veriloghdl语言简介............................................................................................................26§4-2lms均衡器的总体设计预测......................................................................................................264-2-1均衡器总体设计......................................................................................................................264-2-2定点数制运算与精度..............................................................................................................28§4-3各功能模块的设计.......................................................................................................................29iii--------------------------page6------------------------------数字均衡器的设计及verilog实现4-3-1滤波器组件..............................................................................................................................294-3-2系数训练更新组件...................................................................................................................304-3-3延时与精度计算模块的设计................................................................................................31§4-4并行结构和流水线科技................................................................................................................32第五章lms均衡器的实现..................................................................................33§5-1开发软件与器件选择....................................................................................................................335-1-1仿真工具modlesim.................................................................................................................335-1-2集成开发环境alteraquartusii..............................................................................................335-1-3fpga器件的选择....................................................................................................................34§5-2总体仿真分析................................................................................................................................355-2-1测试方式...................................................................................................................................355-2-2仿真结果...................................................................................................................................35§5-3设计的综合与推动.......................................................................................................................365-3-1设计的顶层视图.......................................................................................................................365-3-1设计的综合与推动...................................................................................................................36第六章结论...........................................................................................................38参考文献.................................................................................................................39致谢.........................................................................................................................42攻读学位之后所获得的相关科研成果.................................................................43iv--------------------------page7------------------------------河北工业学校本科学位论文第一章概述§1-1研究的目的与含义在高速通信平台或联通通讯中，信道的串扰效应或频段有限性或者信道传输特征的不规范，都将造成数据流通过信道时不可导致地形成码间串扰（inter-symbolinterference，isi），这将使数据通信的品质得到很严重的影响
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